Branch instructions are a part of the instruction set of most data processors and generally allow a user of the data processor to provide a choice in software program. The choice results in either maintaining a current flow of the software program or moving ("branching") to a different part of the software program. Branch instructions allow the user to have greater flexibility when using the data processor.
Typically, branch instructions are classified as either conditional or unconditional. In conditional branch instructions, a certain condition must be met before a branch operation is performed. For example, a user may specify that a branch operation occur if a predetermined bit is set or is clear, if a data value is equal to a data value in storage, or if a bit in a status register is set. The conditional branch operations discussed herein are provided by way of example only and should not be limited to these conditions.
While providing flexibility, conditional branch instructions typically require a significant amount of circuit area in a data processor. In most implementations, a separate logic circuit is required to execute a conditional branch operation. For example, in the implementation described in U.S. Pat. No. 4,947,369 by Nandor G. Thoma et al., a first programmable logic array (PLA) decodes software instructions for non-branch operations. A condition indicating circuit is also provided to supply signals which indicate whether the results of arithmetic and logic operations in the data processor fulfill certain conditions. A PLA which is responsive to the decision in a conditional branch instruction is then used to evaluate whether a condition has been met or not. A branch PLA responds to the outputs of the condition PLA to produce a branch type microword sequence if the conditions are met. Otherwise, the data processor evaluates a next instruction in the software program code.
While this method performs branch operations quickly, a significant amount of circuit area in the central processing unit (CPU) of the data processor is used to implement the branch PLA. In implementations which require small circuit areas, the branch PLA may prohibit other features from being added to the data processor.
Additionally, the instruction flow of a branch instruction being executed by the data processor is not executed in a straight line sequence. The branch PLA generates the microword sequence for branch operations and the first PLA generates the microword sequence for all other operations. Because two PLA's are used to generate microword sequences for operation of the data processor, additional circuitry is required to sequence and control use of both the PLA's. Again, more circuitry and, therefore, circuit area is required to implement conditional branch operations.
Therefore, a need exists in cost sensitive microprocessors for a system or method for performing conditional branch operations in a data processor which requires less circuit area than conventional implementations. The system or method should also execute conditional branch operations quickly and inexpensively.